This invention relates to a semiconductor memory device having a memory cell constituted of a transistor and a capacitor, and more particularly to a semiconductor memory device of a structure in which a transistor is formed above a capacitor, and also to a method for manufacturing the device.
In semiconductor memory devices such as DRAMs having a memory cell formed of a MOS transistor and capacitor, their capacitor structures have been being formed three-dimensional in order to increase the is capacitor area. The three-dimensional capacitor structures include a trench capacitor. The trench capacitor is mainly formed of side surfaces of a trench which is formed in a silicon substrate. The trench capacitor has a superior flatness to, for example, a stacked-type capacitor, and is now being developed for 256-Mbit or 1-Gbit DRAMs.
Also in the case of the trench capacitor, to secure a sufficient trench side-surface area is becoming difficult in accordance with miniaturization of memory cells. This is partially because the trench capacitor is arranged adjacent and parallel to a MOS transistor, and hence the smaller the area of each memory cell, the smaller the trench diameter.
As an attempt to solve this problem, IEDM""88 Technical Digest, pp.588-591, xe2x80x9cA Buried-Trench DRAM Cell Using Self-Aligned Epitaxy Over Trench Technologyxe2x80x9d (document A) discloses formation of a transistor on a trench capacitor to secure a sufficient trench diameter.
The technique disclosed in the above document (A) is excellent, in which an epitaxial Si layer for forming a transistor is grown on a trench capacitor using self-aligned epitaxy, and one of the drain and source of the transistor is electrically connected to the storage electrode of the capacitor.
In this technique, however, it is difficult to control the crystal growth of the epitaxial Si layer for forming the transistor, which means that it is difficult to secure an epitaxial Si layer of an excellent quality. This is because the epitaxial Si layer is formed on a silicon dioxide film which is provided on the trench capacitor. Accordingly, it is very difficult to form high quality transistors over the entire wafer.
In addition, the connection between the one of the source and drain of the transistor and the storage electrode of the capacitor is a buried strap connection using diffusion of an impurity contained in the storage electrode. Since the buried strap connection uses only impurity diffusion, the connection is not reliable, and the process for realizing the connection is not stable, which may result in a low product yield.
This invention has been developed under the above-described circumstances, and is aimed at providing a semiconductor integrated circuit device in which a high quality semiconductor layer is formed for a transistor, and the connection between one of the source and drain of the transistor and the storage electrode of a capacitor is stabilized, and also providing its manufacturing method.
To attain the aim, there is provided a semiconductor integrated circuit device comprising:
a semiconductor substrate having a trench;
a capacitor having a storage electrode formed in the trench;
a first semiconductor layer formed on the semiconductor substrate and the capacitor, the first semiconductor layer being electrically isolated from the storage electrode and having a hole extending to the storage electrode;
a connection member formed in the hole and electrically isolated from the first semiconductor layer in a substrate in-plane direction;
a second semiconductor layer formed on the first semiconductor layer and the connection member; and
a transistor formed in the second semiconductor layer, and having a source and a drain, one of the source and the drain being connected to the connection member in a direction of lamination of the substrate and the layers.
In the semiconductor integrated circuit device constructed as above, the second semiconductor layer is formed on the first semiconductor layer. This means that a two-stage epitaxial growth method can be used. The two-stage epitaxial growth method can reduce, in particular, the defect level of the second semiconductor layer. Accordingly, the semiconductor layer in which a transistor is formed can be made to have a high quality.
Further, one of the source and the drain is connected to the connection member in a direction of lamination of the substrate and the layers. Accordingly, one of the source and the drain can be directly connected to the top surface of the connection member. In other words, one of the source and the drain can be connected to the connection member by surface strap. The surface strap structure can achieve more reliable connection than a buried strap structure as disclosed in the aforementioned document (A), which uses only diffusion of an impurity contained in the storage electrode. Thus, stable connection can be realized between one of the source and the drain and the connection member (storage electrode).
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.